Hardware Information

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CHIP is often used in embedded applications where it interacts with the outside world via sensors and controls via specialized communications buses (I2C, SPI) and via General Purpose Input/Output lines (GPIO).


There was a question about the voltage levels needed by a relay module, which is designed for 5V, as it relates to CHIP's GPIOs, which are based on 3.3V. There are some circumstances where interfacing a 5V peripheral to a 3.3V GPIO can lead to damage to CHIP. The answer led to a somewhat in-depth description of diodes.


The AXP209 power controller is described in the page AXP209.


CHIP uses flash memory, based on NAND technology, as a solid-state hard disk. See Flash for more information.


GPIO lines are single-bit input/output connections that can interface the CHIP board to external devices. These "GPIO lines" are sometimes referred to as "GPIO pins", a reference to the "pins" of an integrated circuit chip.

There are multiple classes of GPIO lines:

  • CSI - GPIO lines handled directly by CHIP's CPU.
  • XIO - Expanded GPIO lines handled by a PCF8574A device, connected to the CPU via I2C bus.
  • ...

For detailed information on the usage of GPIO lines, see GPIO Info.

I2C Bus

The I2C bus (pronounced "eye-squared-see bus") is a simple serial communications bus that connects CHIP's main CPU to various peripheral devices. Some of those devices are on the CHIP board itself, like the PCF8574A GPIO expansion device. In addition, the I2C bus is made available on CHIP's headers for connection to off-board devices, like temperature sensors, etc.

Using the NTC-provided image with Linux 4.4.13-ntc-mlc the i2c buses appear as follows:

- /dev/i2c0: not exposed, has axp209 PMIC
- /dev/i2c1: TWI1 on U13 pins 9&11
- /dev/i2c2: TWI2 on U14 pins 25&26, has pcf8574 I/O expander


The SPI bus is a simple serial communications bus that connects CHIP's main CPU to various peripheral devices.

Using the NTC-provided image with Linux 4.4.13-ntc-mlc there is one SPI bus available as /dev/spi32766.0. To enable the bus, add the following lines into /etc/rc.local (before the exit 0 statement) and reboot.

mkdir -p /sys/kernel/config/device-tree/overlays/spi
cat /lib/firmware/nextthingco/chip/sample-spi.dtbo > /sys/kernel/config/device-tree/overlays/spi/dtbo


- CS:	U14_27
- CLK:	U14_28
- MOSI: U14_29
- MISO: U14_30

(Credit for these instructions: https://bbs.nextthing.co/t/second-serial-port/4163/83)


CHIP has two uarts exposed on the U13/U14 connectors.


Uart1 on U14 is used for the linux console and is also used by uboot. It shows up as /dev/ttyS0 and has a getty process running on it and is best left as-is, unless you really need it. To disable getty so you can use it for other purposes run:

sudo systemctl stop serial-getty@ttyS0.service

The TX pin outputs 3.3V.

The RX pin is 5V-tolerant.


Uart2 on U13 shows up as /dev/ttyS1 but some magic is still needed to make it work. The forum message to peruse is: https://bbs.nextthing.co/t/second-serial-port/4163/70 with details showing up earlier in the thread. (The info is a bit scattered and needs to be summarized here, ideally with a DTBO.)

Pin overview

The table below shows the extended functionality of all CHIP's pins. The pins are ordered to represent the actual pinout of the 2 connectors: the middle columns (4th and 5th) are like a top view of the connector. Columns to the left decribe the left pins, columns to the right describe the pins on the right hand side of the connector. I'm sure you get the picture.

Information in the table is:

  • Name: the name of the pin given by NTC and printed on the connector block
  • Description: all functions that pin is capable of
  • R8 pin: the name of the actual R8 processor pin to which this pin is connected.
  • GPIO: the GPIO line name for the pin, when three numbers are shown (e.g. 408/1016/1013) they refer to
  kernel 4.3/4.4.11/4.4.13 respectively.

Thanks to Stuart's post and xtacocorex's post

The U13-connector:

GPIO R8 pin Description Name Pin Pin Name Description R8 pin GPIO
Ground GND 1 2 CHG-IN or ACIN-5V 5V input
5V output VCC-5V 3 4 GND Ground
3.3V output VCC3V3 5 6 TS Analogue temperature sensor input
1.8V output VCC-1V8 7 8 VBAT-EXT LIPO battery
48 E2 PB16 (I/O) / TWI1_SDA TWI1-SDA 9 10 PWRON Power button (pull to GND on push)
47 C9 PB15 (I/O) / TWI1_SCK TWI1-SCK 11 12 GND Ground
B2 Touch Panel ADC input X1 X1 13 14 X2 Touch Panel ADC input X2 B3
B1 Touch Panel ADC input Y1 Y1 15 16 Y2 Touch Panel ADC input Y2 A2
98 F12 PD2 (I/O) / LCD_D2 / UART2_TX LCD-D2 17 18 PWM0 PB2 (I/O) / PWM / EINT16 A7 34
100 G11 PD4 (I/O) / LCD_D4 / UART2_CTS LCD-D4 19 20 LCD-D3 PD3 (I/O) / LCD_D3 / UART2_RX D16 99
102 H9 PD6 (I/O) / LCD_D6 LCD-D6 21 22 LCD-D5 PD5 (I/O) / LCD_D5 / UART2_RTS E16 101
106 C16 PD10 (I/O) / LCD_D10 LCD-D10 23 24 LCD-D7 PD7 (I/O) / LCD_D7 H13 103
108 E12 PD12 (I/O) / LCD_D12 LCD-D12 25 26 LCD-D11 PD11 (I/O) / LCD_D11 G10 107
110 B16 PD14 (I/O) / LCD_D14 LCD-D14 27 28 LCD-D13 PD13 (I/O) / LCD_D13 H5 109
114 E11 PD18 (I/O) / LCD_D18 LCD-D18 29 30 LCD-D15 PD15 (I/O) / LCD_D15 E5 111
116 D12 PD20 (I/O) / LCD_D20 LCD-D20 31 32 LCD-D19 PD19 (I/O) / LCD_D19 D6 115
118 D11 PD22 (I/O) / LCD_D22 LCD-D22 33 34 LCD-D21 PD21 (I/O) / LCD_D21 B15 117
120 B9 PD24 (I/O) / LCD_CLK LCD-CLK 35 36 LCD-D23 PD23 (I/O) / LCD_D23 B14 119
123 D5 PD27 (I/O) / LCD_VSYNC LCD-VSYNC 37 38 LCD-HSYNC PD26 (I/O) / LCD_HSYNC B8 122
Ground GND 39 40 LCD-DE PD25 (I/O) / LCD_DE H8 121

The U14-connector:

GPIO R8 pin Description Name Pin Pin Name Description R8 pin GPIO
Ground GND 1 2 VCC-5V 5V output
195 H15 PG3 (I/O) / UART1_TX / EINT3 UART1-TX 3 4 HPL Headphone Left channel output A4
196 G9 PG4 (I/O) / UART1_RX / EINT4 UART1-RX 5 6 HPCOM Headphone amplifier output A5
E15 Boot Mode selection FEL 7 8 HPR Headphone Right channel output A6
3.3V output VCC-3V3 9 10 MICM Microphone ground
B13 Low resolution ADC input LRADC 11 12 MICIN1 microphone input B5
408/1016/1013 General 0 (I/O) XIO-P0 13 14 XIO-P1 General 1 (I/O) 409/1017/1014
410/1018/1015 General 2 (I/O) XIO-P2 15 16 XIO-P3 General 3 (I/O) 411/1019/1016
412/1020/1017 General 4 (I/O) XIO-P4 17 18 XIO-P5 General 5 (I/O) 413/1021/1018
414/1022/1019 General 6 (I/O) XIO-P6 19 20 XIO-P7 General 7 (I/O) 415/1023/1020
Ground GND 21 22 GND Ground
193 H14 PG1 (I) / GPS_SIGN / EINT1 AP-EINT1 23 24 AP-EINT3 PB3 (I/O) / IR_TX / EINT17 F16 35
50 H12 PB18 (I/O) / TWI2_SDA TWI2-SDA 25 26 TWI2-SCK PB17 (I/O) / TWI2_SCK H10 49
128 H3 PE0 (I) / CSI_PCLK / TS_CLK / SPI2_SCO / EINT14 CSIPCK 27 28 CSICK PE1 (I) / CSI_MCLK / TS_ERR / SPI2_CLK / EINT15 C8 129
132 C2 PE4 (I/O) / CSI_D0 / TS_D0 / SDC2_D0 CSID0 31 32 CSID1 PE5 (I/O) / CSI_D1 / TS_D1/ SDC2_D1 C7 133
134 D1 PE6 (I/O) / CSI_D2 / TS_D2 / SDC2_D2 CSID2 33 34 CSID3 PE7 (I/O) / CSI_D3 / TS_D3 / SDC2_D3 C5 135
136 H7 PE8 (I/O) / CSI_D4 / TS_D4 / SDC2_CMD CSID4 35 36 CSID5 PE9 (I/O) / CSI_D5 / TS_D5 / SDC2_CLK B10 137
138 D2 PE10 (I/O) / CSI_D6 / TS_D6 / UART1_TX CSID6 37 38 CSID7 PE11 (I/O) / CSI_D7 / TS_D7 / UART1_RX D7 139
Ground GND 39 40 GND Ground